The present invention generally relates to semiconductor devices and more particularly to a semiconductor device having a flip-chip structure.
The art of flip-chip mounting is used extensively in the semiconductor devices for use in high-frequency applications such as radio telecommunication systems including portable telephones or automotive radar systems that use a millimeter band.
In a flip-chip structure, a semiconductor chip carrying thereon an electrode pad is mounted on a mount substrate in a turned-over state such that the electrode pad on the semiconductor chip achieves a contact with a corresponding wiring pattern provided on the mount substrate by a solder bump. As the electrode pad on the semiconductor chip contacts the wiring pattern on the mount substrate directly in such a flip-chip structure, the problem of parasitic inductance, which occurs in the case where the semiconductor chip is mounted by an ordinary wire bonding process, is effectively and successfully eliminated.
FIG. 1 shows the construction of a conventional semiconductor device 10 having a typical flip-chip structure.
Referring to FIG. 1, the semiconductor device 10 is formed of a mount substrate 1 carrying thereon a wiring pattern 1A and a semiconductor chip 2 mounted on the mounting substrate 1, and the semiconductor chip 2 carries, on a principal surface thereof, a wiring pattern 2A that includes electrode pads. The semiconductor chip 2 is mounted on the mount substrate 1 in a turned-over state such that the foregoing principal surface faces the mount substrate 1. Thereby, the wiring pattern 2A on the chip 2 is connected to the corresponding wiring pattern 1A on the mount substrate 1 electrically as well as mechanically by a solder bump 3.
In such a semiconductor device having a flip-chip structure, the distance between the mount substrate 1 and the semiconductor chip 2 is determined such that the wiring patterns 1A and 2A have a predetermined optimum impedance, which may be set to 50 .OMEGA., for facilitating the signal transmission via the wiring patterns 1A and 2A. Similarly, the width of the patterns 1A and 2A are set to respective predetermined widths.
In such conventional flip-chip semiconductor devices, however, there has been a problem, associated with the fact that both the signal conductor pattern and the power conductor pattern in the wiring pattern 1A or 2A have the same impedance of 50 .OMEGA., in that the high-frequency signal on the signal conductor pattern tends to leak to the power conductor pattern. While this problem may be overcome by merely increasing the impedance thereof by reducing the width of the power conductor pattern, such an approach is not preferable because it decreases the electric current to be supplied by such a power conductor pattern.